This unit introduces you to modern logic design techniques, hardware used and common representations. Topics include two and multi-level combinational logic, decoders, multiplexers, arithmetic circuits, programmable and steering logic, flip-flops, registers, counters, RAM and ROM. Using this hardware the design component will include finite state machine design and applications to computer data path control. This will incorporate simple analogue and digital I/O interfacing. Programmable logic devices will be covered, and the use of a hardware description language for describing, synthesising and testing digital logic. Laboratories cover logic design, implementation, and testing.
The minimum total expected workload to achieve the learning outcomes for this unit is 144 hours per semester typically comprising a mixture of 3-6 hours of scheduled learning activities and 6-9 hours of independent study per week. Scheduled activities may include a combination of teacher-directed learning, peer-directed learning and online engagement. Independent study may include associated readings, assessment and preparation for scheduled activities.
Construct and simulate efficient and effective digital logic designs using integrated development environments and a hardware description language.
Discuss the fundamental behaviours of digital systems such as time-delay and metastability and interpret their impact on digital systems.
Analyse complex combinational and sequential digital designs using high-level abstractions.
Propose solutions to real-world specifications by selecting appropriate technologies, such as FPGAs, PLDs and PLCs, and constructing complex digital systems.
Interpret primitive logic circuitry and apply minimisation and realisation techniques to the resultant problems.
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