Week 1Number Systems & Binary Representation
### 📖 核心知识点：数制与二进制表示 本周是计算机系统的基础入口，学习计算机如何用二进制表示所有数据。掌握 Binary、Hexadecimal、Octal 之间的转换方法，理解 Unsigned 和 Signed (Two's Complement) 整数表示。学习 Bit、Byte、Word 等存储单位的概念。 - **核心概念/公式**: Binary ↔ Decimal 转换、Two's Complement 表示法、Hexadecimal 缩写、Sign Extension ⏰ **本周节奏**: 难度 ⭐⭐ | 预计投入 10h（Lecture 2h + Lab 4h + 自学 4h） 🎯 **考试关联**: Final Exam (50%) 必考数制转换题，In-semester Theory Exam (20%) 覆盖 Week 1-5 内容。需要快速准确完成进制转换。 🧪 **Tutorial/Lab**: 首次 Lab 熟悉 Atmel Studio / Microchip Studio 开发环境，完成基础的 AVR 板卡连接和 LED 闪烁实验。Lab 从 Week 1 开始，需携带学生证。 📌 **作业关联**: Assignment 1 (Digital Logic Design, 18-20%) 覆盖 Week 1-5，本周开始建立基础。 ⚠️ **易错点**: Two's Complement 的最高位是符号位而非普通权重位；-128 到 +127 的范围容易记错。Hex 转 Binary 时漏掉前导零。 （数据来源：2025 S1/S2 UQ Course Profile，CSSE2010）
WeeklyLectureTherearetwo1-hourweeklylecturesTue4-5pm
💡 学习提示
• 总结 Weekly Lecture There are two 1-hour weekly lectures ( Tue 4-5pm and Fri 12-1pm ). Refer to detailed teaching outline on Blackboard for more information about public holidays and refer to student timetable for any updates on the venues/times. Lectures are expected to be recorded and made available on the course Blackboard site, although there is no guarantee that recordings will always work. Lectures provide an introduction to the course material and present examples to help students understand the principles and techniques. There may be recommended reading or other activities which should be undertaken before a lecture. Please note that the lecture slides in the course notes may NOT be a complete record of the lecture. Examples will be worked through and exercises undertaken which may not be shown on the slides. Interactive polls may be used to assess understanding and get feedback from students. It is strongly suggested that you attend the lectures or watch the recording each week to maintain progressive learning. 的核心概念与适用场景
• 为第1周生成 5 道练习题并给出解题步骤
Week 2Boolean Algebra & Logic Gates
### 📖 核心知识点：布尔代数与逻辑门 学习 Boolean Algebra 的基本定律（Identity, Complement, Commutative, Associative, Distributive, De Morgan's）。掌握 AND, OR, NOT, NAND, NOR, XOR, XNOR 七种基本逻辑门的真值表和符号。学习如何用 Boolean Expression 描述逻辑电路。 - **核心概念/公式**: De Morgan's Theorem: (A·B)' = A'+B', (A+B)' = A'·B'；Truth Table 构造法；SOP (Sum of Products) 与 POS (Product of Sums) ⏰ **本周节奏**: 难度 ⭐⭐⭐ | 预计投入 10h（Lecture 2h + Lab 4h + 自学 4h） 🎯 **考试关联**: Boolean 化简是必考题型，Theory Exam 和 Final Exam 都会出现。需要熟练运用 De Morgan 定律。 🧪 **Tutorial/Lab**: 使用 Logisim 或类似工具搭建基本逻辑门电路，验证真值表。实验验证 De Morgan 定律。 📌 **作业关联**: Assignment 1 (Digital Logic Design) 的基础模块，需要用 Boolean Algebra 化简表达式。 ⚠️ **易错点**: De Morgan 定律展开时忘记同时取反和换运算符；SOP/POS 形式混淆；真值表行数 = 2^n 计算错误。 （数据来源：2025 S1/S2 UQ Course Profile，CSSE2010）
WeeklyLectureTherearetwo1-hourweeklylecturesTue4-5pm
💡 学习提示
• 总结 Weekly Lecture There are two 1-hour weekly lectures ( Tue 4-5pm and Fri 12-1pm ). Refer to detailed teaching outline on Blackboard for more information about public holidays and refer to student timetable for any updates on the venues/times. Lectures are expected to be recorded and made available on the course Blackboard site, although there is no guarantee that recordings will always work. Lectures provide an introduction to the course material and present examples to help students understand the principles and techniques. There may be recommended reading or other activities which should be undertaken before a lecture. Please note that the lecture slides in the course notes may NOT be a complete record of the lecture. Examples will be worked through and exercises undertaken which may not be shown on the slides. Interactive polls may be used to assess understanding and get feedback from students. It is strongly suggested that you attend the lectures or watch the recording each week to maintain progressive learning. 的核心概念与适用场景
• 为第2周生成 5 道练习题并给出解题步骤
Week 3Combinational Logic Circuits
### 📖 核心知识点：组合逻辑电路 学习 Karnaugh Map (K-Map) 化简方法，将复杂 Boolean 表达式化简为最简形式。掌握 Multiplexer (MUX)、Decoder、Encoder、Adder (Half Adder, Full Adder) 等基本组合逻辑电路的设计。学习从 Truth Table → K-Map → 最简表达式 → 电路图的完整设计流程。 - **核心概念/公式**: K-Map 化简规则（相邻格合并为 2/4/8 组）、Ripple Carry Adder 结构、MUX 作为通用逻辑实现器 ⏰ **本周节奏**: 难度 ⭐⭐⭐ | 预计投入 10h（Lecture 2h + Lab 4h + 自学 4h） 🎯 **考试关联**: K-Map 化简是 Theory Exam 和 Final Exam 的高频考点，通常占 10-15 分。MUX/Decoder 设计题也常出现。 🧪 **Tutorial/Lab**: 用 K-Map 化简给定函数并在 Logisim 中实现电路，比较化简前后的门数量差异。 📌 **作业关联**: Assignment 1 核心内容 — 需要设计包含 MUX 和 Adder 的组合逻辑电路。 ⚠️ **易错点**: K-Map 中 Don't Care 条件的处理；4 变量 K-Map 的 Gray Code 排列顺序容易搞错；忘记检查所有 Prime Implicant。 （数据来源：2025 S1/S2 UQ Course Profile，CSSE2010）
WeeklyLectureTherearetwo1-hourweeklylecturesTue4-5pm
💡 学习提示
• 总结 Weekly Lecture There are two 1-hour weekly lectures ( Tue 4-5pm and Fri 12-1pm ). Refer to detailed teaching outline on Blackboard for more information about public holidays and refer to student timetable for any updates on the venues/times. Lectures are expected to be recorded and made available on the course Blackboard site, although there is no guarantee that recordings will always work. Lectures provide an introduction to the course material and present examples to help students understand the principles and techniques. There may be recommended reading or other activities which should be undertaken before a lecture. Please note that the lecture slides in the course notes may NOT be a complete record of the lecture. Examples will be worked through and exercises undertaken which may not be shown on the slides. Interactive polls may be used to assess understanding and get feedback from students. It is strongly suggested that you attend the lectures or watch the recording each week to maintain progressive learning. 的核心概念与适用场景
• 为第3周生成 5 道练习题并给出解题步骤
Week 4Sequential Logic: Flip-Flops & Registers
### 📖 核心知识点：时序逻辑 - 触发器与寄存器 从组合逻辑进入时序逻辑，学习 Latch (SR, D) 和 Flip-Flop (D, JK, T) 的工作原理与区别。掌握 Clock Edge Triggering 概念。学习 Register（寄存器）作为多位存储元件的构成，以及 Shift Register 的应用。 - **核心概念/公式**: D Flip-Flop 特征方程 Q(next)=D；JK Flip-Flop 特征方程 Q(next)=JQ'+K'Q；Setup Time 和 Hold Time 约束 ⏰ **本周节奏**: 难度 ⭐⭐⭐⭐ | 预计投入 10h（Lecture 2h + Lab 4h + 自学 4h） 🎯 **考试关联**: Flip-Flop 状态转换和时序图分析是必考内容。Theory Exam (Week 1-5) 的核心考点之一。 🧪 **Tutorial/Lab**: 在仿真环境中搭建 D Flip-Flop 和 4-bit Register，观察时钟边沿触发行为。 📌 **作业关联**: Assignment 1 可能涉及时序逻辑设计，本周是关键基础。 ⚠️ **易错点**: Latch (电平触发) 和 Flip-Flop (边沿触发) 的区别是高频错误点；画时序图时忘记 propagation delay；Setup/Hold Time 违反导致 metastability。 （数据来源：2025 S1/S2 UQ Course Profile，CSSE2010）
WeeklyLectureTherearetwo1-hourweeklylecturesTue4-5pm
💡 学习提示
• 总结 Weekly Lecture There are two 1-hour weekly lectures ( Tue 4-5pm and Fri 12-1pm ). Refer to detailed teaching outline on Blackboard for more information about public holidays and refer to student timetable for any updates on the venues/times. Lectures are expected to be recorded and made available on the course Blackboard site, although there is no guarantee that recordings will always work. Lectures provide an introduction to the course material and present examples to help students understand the principles and techniques. There may be recommended reading or other activities which should be undertaken before a lecture. Please note that the lecture slides in the course notes may NOT be a complete record of the lecture. Examples will be worked through and exercises undertaken which may not be shown on the slides. Interactive polls may be used to assess understanding and get feedback from students. It is strongly suggested that you attend the lectures or watch the recording each week to maintain progressive learning. 的核心概念与适用场景
• 为第4周生成 5 道练习题并给出解题步骤
Week 5Counters & Finite State Machines
### 📖 核心知识点：计数器与有限状态机 学习 Synchronous Counter 和 Asynchronous Counter 的设计方法。掌握 Finite State Machine (FSM) 的 Moore 模型和 Mealy 模型，学习 State Diagram → State Table → Flip-Flop 输入方程 → 电路实现的完整设计流程。 - **核心概念/公式**: Moore FSM（输出只依赖状态）vs Mealy FSM（输出依赖状态+输入）；State Encoding 方法；Next-State Logic 推导 ⏰ **本周节奏**: 难度 ⭐⭐⭐⭐ | 预计投入 10h（Lecture 2h + Lab 4h + 自学 4h）🔥 高压周：Theory Exam 覆盖到本周 🎯 **考试关联**: FSM 设计是 Theory Exam (20%) 的重点。Final Exam 也会出 FSM 状态转换题。需要能快速画出 State Diagram 和推导 Next-State 方程。 🧪 **Tutorial/Lab**: 设计一个 3-bit Up/Down Counter 的 FSM，实现完整的 State Diagram → 电路流程。 📌 **作业关联**: Assignment 1 (Digital Logic Design, 18-20%) 截止在即，需要提交完整的数字逻辑设计。 ⚠️ **易错点**: State Encoding 选择影响电路复杂度；忘记处理 unused states 导致电路在意外状态下行为不确定；Moore/Mealy 输出时序差一个周期。 （数据来源：2025 S1/S2 UQ Course Profile，CSSE2010）
WeeklyLectureTherearetwo1-hourweeklylecturesTue4-5pm
💡 学习提示
• 总结 Weekly Lecture There are two 1-hour weekly lectures ( Tue 4-5pm and Fri 12-1pm ). Refer to detailed teaching outline on Blackboard for more information about public holidays and refer to student timetable for any updates on the venues/times. Lectures are expected to be recorded and made available on the course Blackboard site, although there is no guarantee that recordings will always work. Lectures provide an introduction to the course material and present examples to help students understand the principles and techniques. There may be recommended reading or other activities which should be undertaken before a lecture. Please note that the lecture slides in the course notes may NOT be a complete record of the lecture. Examples will be worked through and exercises undertaken which may not be shown on the slides. Interactive polls may be used to assess understanding and get feedback from students. It is strongly suggested that you attend the lectures or watch the recording each week to maintain progressive learning. 的核心概念与适用场景
• 为第5周生成 5 道练习题并给出解题步骤
Week 6Computer Organization & CPU Architecture
### 📖 核心知识点：计算机组成与CPU架构 从数字逻辑进入计算机体系结构层面。学习 Von Neumann 架构的基本组成（CPU、Memory、I/O、Bus）。理解 CPU 内部结构：ALU (Arithmetic Logic Unit)、Control Unit、Registers、Program Counter。学习 Fetch-Decode-Execute 指令周期。 - **核心概念/公式**: Von Neumann 架构五大组件、Instruction Cycle (Fetch→Decode→Execute→Store)、CPU Datapath、Control Signals ⏰ **本周节奏**: 难度 ⭐⭐⭐ | 预计投入 10h（Lecture 2h + Lab 4h + 自学 4h）。In-semester Lab Exam 本周进行。 🎯 **考试关联**: CPU 架构和指令周期是 Final Exam (50%) 的核心考点。Lab Exam (10%) 本周考查 Week 1-5 的实验操作能力。 🧪 **Tutorial/Lab**: In-semester Lab Exam (10%) — 60分钟，需要身份验证，考查数字逻辑实验操作。Lab exam 覆盖前 5 周内容。 📌 **作业关联**: 过渡到 Assignment 2 (AVR Programming, 18-20%) 的准备阶段，理解 CPU 架构为后续汇编编程打基础。 ⚠️ **易错点**: 混淆 Harvard Architecture 和 Von Neumann Architecture 的区别（AVR 实际使用 Harvard）；忘记 Program Counter 在每次 Fetch 后自动递增。 （数据来源：2025 S1/S2 UQ Course Profile，CSSE2010）
WeeklyLectureTherearetwo1-hourweeklylecturesTue4-5pm
💡 学习提示
• 总结 Weekly Lecture There are two 1-hour weekly lectures ( Tue 4-5pm and Fri 12-1pm ). Refer to detailed teaching outline on Blackboard for more information about public holidays and refer to student timetable for any updates on the venues/times. Lectures are expected to be recorded and made available on the course Blackboard site, although there is no guarantee that recordings will always work. Lectures provide an introduction to the course material and present examples to help students understand the principles and techniques. There may be recommended reading or other activities which should be undertaken before a lecture. Please note that the lecture slides in the course notes may NOT be a complete record of the lecture. Examples will be worked through and exercises undertaken which may not be shown on the slides. Interactive polls may be used to assess understanding and get feedback from students. It is strongly suggested that you attend the lectures or watch the recording each week to maintain progressive learning. 的核心概念与适用场景
• 为第6周生成 5 道练习题并给出解题步骤
Week 7AVR Microcontroller & Assembly Language Basics
### 📖 核心知识点：AVR微控制器与汇编语言基础 开始学习 AVR ATmega324A 微控制器的架构特点。掌握 AVR 汇编指令集的基本指令：数据传送（MOV, LDI, LD, ST）、算术运算（ADD, SUB, INC, DEC）、逻辑运算（AND, OR, EOR）、跳转（RJMP, BREQ, BRNE）。学习寄存器文件（R0-R31）和 Status Register (SREG) 的 Flag 位含义。 - **核心概念/公式**: AVR 32 个通用寄存器、SREG Flags (Z, C, N, V, S, H)、Program Memory vs Data Memory (Harvard Architecture) ⏰ **本周节奏**: 难度 ⭐⭐⭐⭐ | 预计投入 12h（Lecture 2h + Lab 4h + 自学 6h）🔥 高压周：汇编语言学习曲线陡峭 🎯 **考试关联**: AVR 汇编是 Final Exam 的重要组成部分，通常占 20-30%。需要能手写汇编代码并分析执行结果。 🧪 **Tutorial/Lab**: 在 Atmel Studio 中编写第一个 AVR 汇编程序，实现 LED 控制。使用 Simulator 单步调试观察寄存器变化。 📌 **作业关联**: Assignment 2 (AVR Programming) 从本周开始构建，需要用汇编/C 完成嵌入式编程任务。 ⚠️ **易错点**: 高低寄存器的限制（LDI 只能用 R16-R31）；忘记 Branch 指令依赖 SREG 标志位，需要先执行 CP/CPI 比较指令；混淆 Program Memory 和 Data Memory 的地址空间。 （数据来源：2025 S1/S2 UQ Course Profile，CSSE2010）
WeeklyLectureTherearetwo1-hourweeklylecturesTue4-5pm
💡 学习提示
• 总结 Weekly Lecture There are two 1-hour weekly lectures ( Tue 4-5pm and Fri 12-1pm ). Refer to detailed teaching outline on Blackboard for more information about public holidays and refer to student timetable for any updates on the venues/times. Lectures are expected to be recorded and made available on the course Blackboard site, although there is no guarantee that recordings will always work. Lectures provide an introduction to the course material and present examples to help students understand the principles and techniques. There may be recommended reading or other activities which should be undertaken before a lecture. Please note that the lecture slides in the course notes may NOT be a complete record of the lecture. Examples will be worked through and exercises undertaken which may not be shown on the slides. Interactive polls may be used to assess understanding and get feedback from students. It is strongly suggested that you attend the lectures or watch the recording each week to maintain progressive learning. 的核心概念与适用场景
• 为第7周生成 5 道练习题并给出解题步骤
Week 8AVR Assembly: Subroutines & Stack
### 📖 核心知识点：AVR汇编进阶 - 子程序与栈 深入 AVR 汇编编程，学习 Subroutine (CALL/RET) 的调用机制和 Stack 的工作原理。掌握 Stack Pointer (SP) 的初始化和使用，理解 PUSH/POP 操作。学习参数传递的约定（通过寄存器或栈）和局部变量的管理。 - **核心概念/公式**: CALL 指令将返回地址压栈、RET 指令弹出返回地址、Stack 从高地址向低地址增长、PUSH/POP 操作 SP 的变化 ⏰ **本周节奏**: 难度 ⭐⭐⭐⭐⭐ | 预计投入 12h（Lecture 2h + Lab 4h + 自学 6h） 🎯 **考试关联**: 子程序调用和栈操作是 Final Exam 的必考题型。常考"给定代码片段，画出栈的状态变化"类型题目。 🧪 **Tutorial/Lab**: 编写包含多个子程序调用的 AVR 程序，使用 Simulator 观察 Stack 变化。实现递归函数（如阶乘计算）。 📌 **作业关联**: Assignment 2 的核心部分，需要使用子程序组织代码结构。 ⚠️ **易错点**: 忘记初始化 Stack Pointer 导致程序崩溃；CALL 时 PC 占 2 字节被压栈但容易算错 SP 偏移；子程序中修改了调用者的寄存器但没有 PUSH/POP 保存恢复。 （数据来源：2025 S1/S2 UQ Course Profile，CSSE2010）
WeeklyLectureTherearetwo1-hourweeklylecturesTue4-5pm
💡 学习提示
• 总结 Weekly Lecture There are two 1-hour weekly lectures ( Tue 4-5pm and Fri 12-1pm ). Refer to detailed teaching outline on Blackboard for more information about public holidays and refer to student timetable for any updates on the venues/times. Lectures are expected to be recorded and made available on the course Blackboard site, although there is no guarantee that recordings will always work. Lectures provide an introduction to the course material and present examples to help students understand the principles and techniques. There may be recommended reading or other activities which should be undertaken before a lecture. Please note that the lecture slides in the course notes may NOT be a complete record of the lecture. Examples will be worked through and exercises undertaken which may not be shown on the slides. Interactive polls may be used to assess understanding and get feedback from students. It is strongly suggested that you attend the lectures or watch the recording each week to maintain progressive learning. 的核心概念与适用场景
• 为第8周生成 5 道练习题并给出解题步骤
Week 9C Programming for AVR & I/O Ports
### 📖 核心知识点：AVR C语言编程与I/O端口 从汇编过渡到 C 语言进行 AVR 编程。学习 avr-gcc 工具链、Port Register (DDRx, PORTx, PINx) 的配置方法。掌握位操作（Bitwise AND, OR, XOR, Shift）来控制单个引脚。学习 Polling 方式读取按键输入。 - **核心概念/公式**: DDRx 设置方向（0=输入/1=输出）、PORTx 输出/上拉、PINx 读取输入、位掩码操作 (|= 置位, &= ~清零, ^= 翻转) ⏰ **本周节奏**: 难度 ⭐⭐⭐ | 预计投入 10h（Lecture 2h + Lab 4h + 自学 4h） 🎯 **考试关联**: C 语言的位操作和 Port 寄存器配置是 Final Exam 的常考内容。需要能写出操作特定引脚的 C 代码。 🧪 **Tutorial/Lab**: 用 C 语言重写之前汇编实现的 LED 控制程序，实现按键控制 LED 开关的交互功能。 📌 **作业关联**: Assignment 2 (AVR Programming, 18-20%) 的主体开发阶段，大部分功能用 C 语言实现。 ⚠️ **易错点**: DDR 方向设置反了（该设输出设成了输入）；位操作优先级低于比较运算符需要加括号；忘记配置未使用引脚的上拉电阻。 （数据来源：2025 S1/S2 UQ Course Profile，CSSE2010）
WeeklyLectureTherearetwo1-hourweeklylecturesTue4-5pm
💡 学习提示
• 总结 Weekly Lecture There are two 1-hour weekly lectures ( Tue 4-5pm and Fri 12-1pm ). Refer to detailed teaching outline on Blackboard for more information about public holidays and refer to student timetable for any updates on the venues/times. Lectures are expected to be recorded and made available on the course Blackboard site, although there is no guarantee that recordings will always work. Lectures provide an introduction to the course material and present examples to help students understand the principles and techniques. There may be recommended reading or other activities which should be undertaken before a lecture. Please note that the lecture slides in the course notes may NOT be a complete record of the lecture. Examples will be worked through and exercises undertaken which may not be shown on the slides. Interactive polls may be used to assess understanding and get feedback from students. It is strongly suggested that you attend the lectures or watch the recording each week to maintain progressive learning. 的核心概念与适用场景
• 为第9周生成 5 道练习题并给出解题步骤
Week 10Interrupts & Timer Peripherals
### 📖 核心知识点：中断与定时器外设 学习 Interrupt (中断) 机制，理解中断向量表、ISR (Interrupt Service Routine) 的编写、中断优先级和嵌套。掌握 AVR Timer/Counter 外设的配置：Normal Mode, CTC Mode, PWM Mode。学习用定时器实现精确延时和周期性任务。 - **核心概念/公式**: 中断响应流程（保存现场→跳转ISR→恢复现场→返回）、Timer 计数公式 f_timer = f_clk / Prescaler、CTC 模式的 OCR 比较匹配 ⏰ **本周节奏**: 难度 ⭐⭐⭐⭐ | 预计投入 12h（Lecture 2h + Lab 4h + 自学 6h）🔥 高压周 🎯 **考试关联**: 中断和定时器是 Final Exam 的高分值考点，通常占 15-20 分。需要能计算定时器参数并写出 ISR。 🧪 **Tutorial/Lab**: 配置 Timer0 在 CTC 模式下产生精确的 1 秒中断，驱动 LED 闪烁。实现按键中断替代 Polling。 📌 **作业关联**: Assignment 2 通常要求使用中断和定时器实现实时功能。 ⚠️ **易错点**: ISR 中忘记用 volatile 修饰共享变量；Prescaler 选择不当导致定时不准确；ISR 执行时间过长导致中断丢失；忘记 sei() 全局使能中断。 （数据来源：2025 S1/S2 UQ Course Profile，CSSE2010）
WeeklyLectureTherearetwo1-hourweeklylecturesTue4-5pm
💡 学习提示
• 总结 Weekly Lecture There are two 1-hour weekly lectures ( Tue 4-5pm and Fri 12-1pm ). Refer to detailed teaching outline on Blackboard for more information about public holidays and refer to student timetable for any updates on the venues/times. Lectures are expected to be recorded and made available on the course Blackboard site, although there is no guarantee that recordings will always work. Lectures provide an introduction to the course material and present examples to help students understand the principles and techniques. There may be recommended reading or other activities which should be undertaken before a lecture. Please note that the lecture slides in the course notes may NOT be a complete record of the lecture. Examples will be worked through and exercises undertaken which may not be shown on the slides. Interactive polls may be used to assess understanding and get feedback from students. It is strongly suggested that you attend the lectures or watch the recording each week to maintain progressive learning. 的核心概念与适用场景
• 为第10周生成 5 道练习题并给出解题步骤
Week 11Serial Communication: UART & SPI
### 📖 核心知识点：串行通信 - UART与SPI 学习串行通信的基本概念（同步 vs 异步、全双工 vs 半双工）。掌握 UART (Universal Asynchronous Receiver-Transmitter) 的配置：波特率计算、数据帧格式 (Start bit, Data bits, Parity, Stop bit)。了解 SPI (Serial Peripheral Interface) 的主从通信模式。 - **核心概念/公式**: UART 波特率寄存器 UBRR = (f_clk / 16 / baud) - 1、SPI 四线制 (MOSI, MISO, SCK, SS)、Communication Protocol 时序图 ⏰ **本周节奏**: 难度 ⭐⭐⭐ | 预计投入 10h（Lecture 2h + Lab 4h + 自学 4h） 🎯 **考试关联**: UART 波特率计算和 SPI 时序分析是 Final Exam 可能考查的内容。通信协议的对比题也常出现。 🧪 **Tutorial/Lab**: 配置 UART 实现 AVR 与 PC 的串口通信，发送传感器数据到终端显示。 📌 **作业关联**: Assignment 2 (AVR Programming, 18-20%) 截止临近，串口通信可能是项目的调试和数据输出方式。 ⚠️ **易错点**: 波特率计算的四舍五入误差导致通信不稳定；SPI 的 CPOL/CPHA 模式选择与从设备不匹配；忘记配置 TX/RX 引脚方向。 （数据来源：2025 S1/S2 UQ Course Profile，CSSE2010）
WeeklyLectureTherearetwo1-hourweeklylecturesTue4-5pm
💡 学习提示
• 总结 Weekly Lecture There are two 1-hour weekly lectures ( Tue 4-5pm and Fri 12-1pm ). Refer to detailed teaching outline on Blackboard for more information about public holidays and refer to student timetable for any updates on the venues/times. Lectures are expected to be recorded and made available on the course Blackboard site, although there is no guarantee that recordings will always work. Lectures provide an introduction to the course material and present examples to help students understand the principles and techniques. There may be recommended reading or other activities which should be undertaken before a lecture. Please note that the lecture slides in the course notes may NOT be a complete record of the lecture. Examples will be worked through and exercises undertaken which may not be shown on the slides. Interactive polls may be used to assess understanding and get feedback from students. It is strongly suggested that you attend the lectures or watch the recording each week to maintain progressive learning. 的核心概念与适用场景
• 为第11周生成 5 道练习题并给出解题步骤
Week 12Memory Systems & Course Review
### 📖 核心知识点：存储系统与期末复习 学习计算机存储层次结构（Registers → Cache → RAM → Disk）。理解 SRAM 和 DRAM 的工作原理差异。学习 Memory Mapped I/O 的概念。最后一周进行课程整体回顾，重点串联数字逻辑→计算机架构→嵌入式编程的知识链。 - **核心概念/公式**: 存储层次 (Memory Hierarchy)、Cache Hit/Miss Rate、Memory Mapped I/O vs Port Mapped I/O、地址总线宽度决定可寻址空间 ⏰ **本周节奏**: 难度 ⭐⭐⭐ | 预计投入 12h（Lecture 2h + Lab 4h + 自学 6h）📝 复习周 🎯 **考试关联**: Final Exam (50%, Hurdle ≥40%) 覆盖全部 12 周内容。Open-book (部分学期), 120 分钟。重点复习 AVR 汇编手写、中断/定时器配置、数字逻辑设计。 🧪 **Tutorial/Lab**: 最后一次 Lab，完成 Assignment 2 的 Demo 展示（Week 13 进行 demo，需要现场向 Tutor 解释代码）。 📌 **作业关联**: Assignment 2 (AVR Programming, 18-20%, Hurdle ≥10%) 截止提交。Demo 需要在 Week 13 Lab 完成。 ⚠️ **易错点**: Final Exam 需要同时掌握数字逻辑和编程两大块，不能只复习一边；Open-book 不等于不需要准备，需要提前整理笔记索引；Demo 时无法解释自己代码会被怀疑抄袭。 （数据来源：2025 S1/S2 UQ Course Profile，CSSE2010）
WeeklyLectureTherearetwo1-hourweeklylecturesTue4-5pm
💡 学习提示
• 总结 Weekly Lecture There are two 1-hour weekly lectures ( Tue 4-5pm and Fri 12-1pm ). Refer to detailed teaching outline on Blackboard for more information about public holidays and refer to student timetable for any updates on the venues/times. Lectures are expected to be recorded and made available on the course Blackboard site, although there is no guarantee that recordings will always work. Lectures provide an introduction to the course material and present examples to help students understand the principles and techniques. There may be recommended reading or other activities which should be undertaken before a lecture. Please note that the lecture slides in the course notes may NOT be a complete record of the lecture. Examples will be worked through and exercises undertaken which may not be shown on the slides. Interactive polls may be used to assess understanding and get feedback from students. It is strongly suggested that you attend the lectures or watch the recording each week to maintain progressive learning. 的核心概念与适用场景
• 为第12周生成 5 道练习题并给出解题步骤
