This unit helps you build a solid understanding of the performance, specification, and fabrication of large-scale digital circuits, including MOS transistor principles, CMOS inverters, building blocks, and interconnects. You’ll explore how to design, simulate, verify, and debug complex digital circuits using a Hardware Description Language (HDL) and current CAD tools with FPGA development boards. You’ll also become familiar with very large-scale integrated (VLSI) circuit design flow methodologies, including layout placement, partitioning, floor planning, and routing.
The minimum total expected workload to achieve the learning outcomes for this unit is 144 hours per semester typically comprising a mixture of 3-6 hours of scheduled learning activities and 6-9 hours of independent study per week. Scheduled activities may include a combination of teacher-directed learning, peer-directed learning and online engagement. Independent study may include associated readings, assessment and preparation for scheduled activities
Apply and analyse the principles of CMOS Digital Circuits in case studies and problems.
Design a customised IC circuit based on an industrial design case study and perform full verification on the design for manufacturability.
Analyse and evaluate the delay in multiple paths of a VLSI design.
Construct a CMOS layout and assess the design in terms of speed, power and area.
Discuss and evaluate the design process of IC circuits in the semiconductor industry.
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